典型文献
Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique
文献摘要：
In this article,the design,fabrication and characterization of silicon carbide(SiC)complementary-metal-oxide-semicon-ductor(CMOS)-based integrated circuits(ICs)are presented.A metal interconnect strategy is proposed to fabricate the funda-mental N-channel MOS(NMOS)and P-channel MOS(PMOS)devices that are required for the CMOS circuit configuration.Based on the mainstream 6-inch SiC wafer processing technology,the simultaneous fabrication of SiC CMOS ICs and power MOSFET is realized.Fundamental gates,such as inverter and NAND gates,are fabricated and tested.The measurement results show that the inverter and NAND gates function well.The calculated low-to-high delay(low-to-high output transition)and high-to-low delay(high-to-low output transition)are 49.9 and 90 ns,respectively.
文献关键词：
中图分类号：
作者姓名：
Tongtong Yang;Yan Wang;Ruifeng Yue
作者机构：
School of Integrated Circuits,Tsinghua University,Beijing 100084,China;Beijing National Research Center for Information Science and Technology,Beijing 100084,China
文献出处：
引用格式：
[1]Tongtong Yang;Yan Wang;Ruifeng Yue-.Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique)[J].半导体学报（英文版）,2022(08):73-76
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B类：
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0.552113
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