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典型文献
Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits
文献摘要:
Designing logic circuits using complementary metal-oxide-semiconductor(CMOS)technology at the nano scale has been faced with various challenges recently.Undesirable leakage currents,the short-effect channel,and high energy dissipation are some of the concerns.Quantum-dot cellular automata(QCA)represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard CMOS.The key point of designing arithmetic circuits is based on the structure of a 1-bit full adder.A low-complexity full adder block is beneficial for developing various intricate structures.This paper represents scalable 1-bit QCA full adder structures based on cell interaction.Our proposed full adders encompass preference aspects of QCA design,such as a low number of cells used,low latency,and small area occupation.Also,the proposed structures have been expanded to larger circuits,including a 4-bit ripple carry adder(RCA),a 4-bit ripple borrow subtractor(RBS),an add/sub circuit,and a 2-bit array multiplier.All designs were simulated and verified using QCA Designer-E version 2.2.This tool can estimate the energy dissipation as well as evaluate the performance of the circuits.Simulation results showed that the proposed designs are efficient in complexity,area,latency,cost,and energy dissipation.
文献关键词:
作者姓名:
Hamideh KHAJEHNASIR-JAHROMI;Pooya TORKZADEH;Massoud DOUSTI
作者机构:
Department of Electrical and Computer Engineering,Science and Research Branch,Islamic Azad University,Tehran 1477893855,Iran
引用格式:
[1]Hamideh KHAJEHNASIR-JAHROMI;Pooya TORKZADEH;Massoud DOUSTI-.Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits)[J].信息与电子工程前沿(英文),2022(08):1264-1276
A类:
adders,adder
B类:
Introducing,scalable,bit,full,designing,quantum,dot,cellular,automata,arithmetic,circuits,Designing,logic,using,complementary,metal,oxide,semiconductor,CMOS,technology,nano,scale,has,been,faced,various,challenges,recently,Undesirable,leakage,currents,short,effect,channel,high,energy,dissipation,some,concerns,Quantum,QCA,appropriate,alternative,possible,replacement,future,because,consumes,insignificant,amount,compared,standard,key,point,low,complexity,block,beneficial,developing,intricate,structures,This,paper,represents,interaction,Our,proposed,encompass,preference,aspects,such,number,cells,used,latency,small,area,occupation,Also,have,expanded,larger,including,ripple,carry,RCA,borrow,subtractor,RBS,array,multiplier,All,designs,were,simulated,verified,Designer,version,tool,estimate,well,evaluate,performance,Simulation,results,showed,that,efficient,cost
AB值:
0.55326
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