典型文献
A 12-bit 80 MS/s 2 mW SAR ADC with Deliberated Digital Calibration and Redundancy Schemes for Medical Imaging
文献摘要:
In this article,we presented a 12-bit 80 MS/s low power successive approximation register(SAR)analog to digital converter(ADC)design.A simplified but effective digital calibration scheme was exploited to make the ADC achieve high resolution without sacrificing more silicon area and power efficiency.A modified redundancy technique was also adopted to guarantee the feasibility of the calibration and meantime ease the burden of the reference buffer circuit.The prototype SAR ADC can work up to a sampling rate of 80 MS/s with the performance of>10.5bit equivalent number of bits(ENOB),<±1 least significant bit(LSB)differential nonlinearity(DNL)&integrated nonlinearity(INL),while only consuming less than 2mA current from a 1.1 V power supply.The calculated figure of merit(FoM)is 17.4 fJ/conversion-step.This makes it a practical and competitive choice for the applications where high dynamic range and low power are simultaneously required,such as portable medical imaging.
文献关键词:
中图分类号:
作者姓名:
HAN Gang;WU Bin;PU Yilin
作者机构:
Intelligent Manufacturing Center,Institute of Microelectronics of the Chinese Academy of Sciences;University of Chinese Academy of Sciences, Beijing 100029, China
文献出处:
引用格式:
[1]HAN Gang;WU Bin;PU Yilin-.A 12-bit 80 MS/s 2 mW SAR ADC with Deliberated Digital Calibration and Redundancy Schemes for Medical Imaging)[J].上海交通大学学报(英文版),2022(02):250-255
A类:
Deliberated,5bit
B类:
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AB值:
0.718894
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