典型文献
Analytical Modeling for Translating Statistical Changes to Circuit Variability by Ultra?Deep Submicron Digital Circuit Design
文献摘要:
This paper presents a physics?based compact gate delay model that includes all short?channelphenomena prevalent at the ultra?deep submicron technology node of 32 nm. To simplify calculations, the proposed model is connected to a compactα?power law?based ( Sakurai?Newton) model. The model has been tested on a wide range of supply voltages. The model accurately predicts nominal delays and the delays under process variations. It has been shown that at lower technology nodes, the delay is more sensitive to threshold voltage variations, specifically at the sub?threshold operating region as compared with effective channel length variations above the threshold region.
文献关键词:
中图分类号:
作者姓名:
Shruti Kalra;Ruby Beniwal
作者机构:
Department of Electronics and Communication,Jaypee Institute of Information Technology,Noida 201307,India
文献出处:
引用格式:
[1]Shruti Kalra;Ruby Beniwal-.Analytical Modeling for Translating Statistical Changes to Circuit Variability by Ultra?Deep Submicron Digital Circuit Design)[J].哈尔滨工业大学学报(英文版),2022(04):70-80
A类:
channelphenomena,Sakurai
B类:
Analytical,Modeling,Translating,Statistical,Changes,Circuit,Variability,by,Ultra,Deep,Submicron,Digital,Design,This,paper,presents,physics,compact,gate,model,that,includes,short,prevalent,ultra,deep,submicron,technology,To,simplify,calculations,proposed,connected,power,law,Newton,has,been,tested,wide,range,supply,voltages,accurately,predicts,nominal,delays,under,process,variations,It,shown,lower,nodes,more,sensitive,threshold,specifically,operating,region,compared,effective,length,above
AB值:
0.622393
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